Abstract:

According to the different ternary fixed polarity RM (Reed-Muller) logic expression corresponding to the circuit area at different polarities, a ternary polarity conversion algorithm for different logic was proposed through the research of multiple valued tabular technique. First, according to the ternary FPRM(Fixed-Polarity ReedMuller) fixed polarity expansion characteristics, the ternary FPRM circuit area estimation model value was established. Second, the ternary sum of product expansion of lattice algebra to the RM logical expansion polarity conversion algorithm was derived from multiple valued tabular technique. On the basis, the genetic algorithm was applied to searching the polarity with the minimal area of the ternary FPRM circuit. Final, the results of testing eight circuits from MCNC Benchmark indicate that this algorithm is highly effective for searching the best polarity. The ternary FPRM circuits under the polarity searched by the proposed algorithm have achieved average areasaving by 47.4％, compared with the circuits under polarity 0.

Key words: ternary FPRM polarity conversion; genetic algorithm; area optimization